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@Timmmm Timmmm commented Nov 19, 2025

In PLIC, interrupt ID 0 is special - it is reserved for "no interrupt". The way this is implemented in rv_plic is by simply asking nicely for integrators to tie the interrupt ID 0 input to 0.

This is suboptimal because it allows integration mistakes, and there is a dangerous assume for FPV - this is directly added inside rv_plic.sv. Unless there's some flow magic to convert this to an assert (I didn't see anything) then this can cause nonsensical formal results if you accidentally violate that assumption.

This changes that assume to an assert so it is at least checked. I would have liked to remove the pin entirely so there is no chance of making that mistake, but that is a much bigger change that requires changing the external interface.

In PLIC, interrupt ID 0 is special - it is reserved for "no interrupt". The way this is implemented in `rv_plic` is by simply asking nicely for integrators to tie the interrupt ID 0 input to 0.

This is suboptimal because it allows integration mistakes, and there is a dangerous `assume` for FPV - this is directly added inside `rv_plic.sv`. Unless there's some flow magic to convert this to an `assert` (I didn't see anything) then this can cause nonsensical formal results if you accidentally violate that assumption.

This changes that assume to an assert so it is at least checked. I would have liked to remove the pin entirely so there is no chance of making that mistake, but that is a much bigger change that requires changing the external interface.

Signed-off-by: Tim Hutt <[email protected]>
@Timmmm Timmmm requested a review from a team as a code owner November 19, 2025 11:26
@Timmmm Timmmm requested review from rswarbrick and removed request for a team November 19, 2025 11:26
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Timmmm commented Nov 19, 2025

25 minute JG results (consistent with other runs I've done):

image

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